The invention relates to a circuit arrangement for the control of a clock signal which is generated through the use of an oscillator and a frequency altering means, the phase positions of which clock signal can be varied by means of a control signal and by which sampling instants are fixed.
According to a prior art data transmission method, data from a data source in the time frame of a bit pattern are coupled to a transmitter in the form of a baseband signal, and after pulse amplitude modulation, transmitted over a transmission path to a demodulator located at the receiver. By way of example, a telephone line may be provided as a transmission path. A binary signal representing the data transmitted is derived at the receiver from the demodulated signal produced by the demodulator through the use of a sampling circuit. The demodulated signal in the sampling circuit is sampled at instants which are dependent on the phase position of a clock signal. In the case of large delay/frequency and/or amplitude/frequency distortions, large linear distortions of the demodulated signal result which may cause a faulty transmission of the data.
It is an object of the invention to provide a circuit arrangement of little complexity for the phase control of a clock signal for compensating for even large linear distortions.